주요 업무 상세 소개

NPU RTL Design

- NPU 연산장치 및 DATA 전송장치 Architect 및 RTL Design

- RTL 검증환경 개발 및 IP 검증

NoC RTL DEsign

- On-chip interconnect Architect 및 RTL Design

-  RTL 검증환경 개발 및 IP 검증

Memory Controller RTL Design

- DDR Memory Controller Architect 및 RTL Design 

-  RTL 검증환경 개발 및 IP 검증

DRAM PHY Digital Design

- Memory Interface PHY Architect 및 RTL Design

- Synthesis, DFT, STA, Place & Route, Phy Modeling, MPW Evaluation, Test Automation

DRAM PHY Analog Design

- Memory Interface PHY Design(High-speed Transeciver, Equalizer, PLL / DLL Design,, SI/PI)

IP Verifaction

- IP Design Verification

- Failure / Root Cause 검출 및 분석

- Mertic Driven Verification (Coverage Analysis)

- Verification Method / Automation Developement

System Architect

- Interconnect Topology Development

- 고객사 SoC에 적합한 IP 제품 제안 및 기술지원

채용구분 : 정규직, 수습 3개월

채용규모 : 00명